Corentin to present at ISSCC 2022

by Drew Comment Closed

Corentin will present his work titled “A 4.4µW, 2.5kHz-BW, 92.1dB-SNDR 3rd-Order VCO-based ADC with Pseudo Virtual Ground Feedforward Linearization” at ISSCC this year! This work shows how one can feed forward the pseudo virtual ground in a capacitively coupled VCO-based ADC to linearize and stabilize the system while only using a single feedback DAC. This approach enables a high dynamic range (DR) due to the 3rd-order noise-shaping and >120dB SFDR due to the linearization. The prototype ADC consumes 4.4µW from a 0.8V supply achieving the best-reported SNDR Schreier Figure-of-Merit (FoM) for VCO-based ADCs at 179.6dB.

Congratulations, Corentin!

Corentin to present at ISSCC 2021

by Drew Comment Closed

Come check out our ISSCC paper, #28.4 titled “A 400mVpp 92.3dB-SNDR 1kHz-BW 2nd-Order VCO-Based ExG-to-Digital Front-End Using a Multiphase Gated-Inverted Ring-Oscillator Quantizer.” Corentin will describe a second-order VCO-only delta-sigma ADC with a wide dynamic range (>90dB) and a high input impedance (>50MΩ) enabling the direct digitization of ExG signals even in the presence of large motion artifacts while consuming less than 6μW. Great work from Corentin Pochet, Jiannan(Jason) Huang, and Patrick Mercier!

Somok to present at ISSCC 2021

by Drew Comment Closed

Come check out our ISSCC paper, #10.2 titled “A 139μW 104.8dB-DR 24kHz-BW CTΔΣM with Chopped AC-Coupled OTA-Stacking and FIR DACs”. Somok will present our work on “OTA-Stacking” to improve the noise efficiency of circuits. Having already shown the benefit of this technique in an ultra-low power ECG amplifier, we demonstrate how this can be used in an analog-to-digital converter (ADC) with state-of-the-art performance. Congrats, Somok Mondal and Omid Ghadami! Also, a post on the JSOE blog here.