Corentin will present his work titled “A 4.4µW, 2.5kHz-BW, 92.1dB-SNDR 3rd-Order VCO-based ADC with Pseudo Virtual Ground Feedforward Linearization” at ISSCC this year! This work shows how one can feed forward the pseudo virtual ground in a capacitively coupled VCO-based ADC to linearize and stabilize the system while only using a single feedback DAC. This approach enables a high dynamic range (DR) due to the 3rd-order noise-shaping and >120dB SFDR due to the linearization. The prototype ADC consumes 4.4µW from a 0.8V supply achieving the best-reported SNDR Schreier Figure-of-Merit (FoM) for VCO-based ADCs at 179.6dB.

Congratulations, Corentin!